| 8088 Instruction Set Summary |
This summary has been compiled from a number of sources, but chiefly from 8086/8088/80286 Assembly Language, by Scanlon, and A86 Macro Assembler and D86 Debugger Reference Manual, by Isaacson. |
| Instruction | Description | Flags | ||||||||||
| S | Z | C | O | P | A | |||||||
| AAA |
ASCII adjust AL (carry into AH) after addition:ASCII (0-9) + ASCII (0-9) ®Unpacked BCD |
? |
? |
ü |
? |
? |
ü |
|||||
| AAD | ASCII adjust before division (AX=10*AH +AL): Unpacked BCD ®Binary |
ü |
ü |
? |
? |
ü |
? |
|||||
| AAM | ASCII adjust after multiply (AL/10: AH=Quo, AL=Rem) Single digit BCD * Single digit BCD ® Unpacked BCD |
ü |
ü |
? |
? |
ü |
? |
|||||
| AAS | ASCII adjust AL (borrow from AH) after subtraction: ASCII (0-9) - ASCII (0-9) ®Unpacked BCD |
? |
? |
ü |
? |
? |
ü |
|||||
| ADC | Add with carry: dest¬dest + source+ CF | ü | ü | ü | ü | ü | ü | |||||
| ADD | Add: dest¬dest+ source | ü | ü | ü | ü | ü | ü | |||||
| AND | And: dest¬dest.AND.source | ü | ü | 0 | 0 | ü | ? | |||||
| CALL | CS:IP or IP ¬address of procedure, stack ¬IP or CS:IP of next instruction | |||||||||||
| CBW | Convert byte to word. AH ¬bit 7of AL | |||||||||||
| CLC | Clear the carry flag. CF ¬0 | 0 | ||||||||||
| CLD | Clear the direction bit. String instructions increment SI and DI | |||||||||||
| CLI | Clear the interrupt enable bit. Maskable interrupts are ignored. | |||||||||||
| CMC | Complement the carry flag | ü | ||||||||||
| CMP | dest- source, result not stored | ü | ü | ü | ü | ü | ü | |||||
| CMPS | [DS:SI] - [ES:DI], update DI and SI (based on D flag) CMPSB and CMPSW are size-specific | ü | ü | ü | ü | ü | ü | |||||
| CWD | DX ¬AX15 | |||||||||||
| DAA | Decimal adjust AL after addition, After a byte-wide add of packed BCD digits, adjusts AL to correct BCD result and sets C if result is > 9910 | ü | ü | ü | ? | ü | ü | |||||
| DAS | Decimal adjust after subtraction. Like DAA | ü | ü | ü | ? | ü | ü | |||||
| DEC | Decrement. dest¬dest - 1 | ü | ü | ü | ü | ü | ||||||
| DIV | Unsigned divide (immediate operand not allowed) AX ¬quo of {DX:AX/(word op)} and DX ¬rem of {DX:AX/(word op)} or AL ¬quo of {AX/(byte op)} and AH ¬rem of {AX/(byte op)} | ? | ? | ? | ? | ? | ? | |||||
| IDIV | Signed divide (immediate operand not allowed) AX, DX ¬quo, rem of {DX:AX/(word op)}, or AL, AH ¬quo, rem of {AX/(byte op)} | ? | ? | ? | ? | ? | ? | |||||
| ESC | put an operand on the data bus | |||||||||||
| HLT | stop the processor until a RESET or external interrupt | |||||||||||
| IMUL | Signed multiply (immediate operand not allowed) DX:AX ¬AX * (word op), or AX ¬ AL * (byte op) | ? | ? | ü | ü | ? | ? | |||||
| IN | AL ¬port, or AX ¬ port port is an immediate 8-bit address or DX | |||||||||||
| INC | dest¬dest+ 1 | ü | ü | ü | ü | ü | ||||||
| INT | execute a software interrupt | |||||||||||
| INTO | execute interrupt 4 if overflow flag is set | |||||||||||
| IRET | return from interrupt | ü | ü | ü | ü | ü | ü | |||||
| Jxx | conditional jumps to a relative address (-128 to +127) JA/JNBE, JAE/JNB, JB/JNAE, JC, JBE/JNA, JCXZ, JE/JZ, JG/JNLE, JGE/JNL, JL/JNGE, JLE/JNG, JNC, JNE/JNZ, JNO, JNP/JPO, JNS, JO, JP/JPE, JS | |||||||||||
| JMP | Jump, IP or CS:IP ¬operand | |||||||||||
| LAHF | Load AH from flags. Bits (0,2,4,6,7) ¬(CF, PF, AF, ZF, SF) | |||||||||||
| LDS | Load pointer using DS DS:dest¬address of operand | |||||||||||
| LEA | dest¬address of operand | |||||||||||
| LES | like LDS, except ES:destreceives address | |||||||||||
| LOCK | A prefix. Bus is locked until execution is completed | |||||||||||
| LODS | Load String. AX or AL ¬[DS:SI], update SI LODSB and LODSW are size-specific | |||||||||||
| LOOP | CX ¬CX - 1, then transfer to short labeldestination if CX ¹0; LOOPE/LOOPZ, transfers if CX ¹0 and ZF = 1; LOOPNE/LOOPNZ transfers if CX ¹0 and ZF = 0. | |||||||||||
| MOV | dest¬operand or data stored at operand address | |||||||||||
| MOVS | [ES:DI] ¬[DS:SI], adjust SI and DI MOVSB and MOVSW are size-specific | |||||||||||
| MUL | Unsigned multiply (immediate operand not allowed) DX:AX ¬AX * (word op), or AX ¬ AL * (byte op) | ? | ? | ü | ü | ? | ? | |||||
| NEG | dest¬- dest | ü | ü | ü | ü | ü | ü | |||||
| NOT | dest¬complement{dest} | |||||||||||
| OR | dest¬dest.OR. source | ü | ü | 0 | 0 | ü | ? | |||||
| OUT | port ¬AL or AX operand is 8-bit immediate or DX | |||||||||||
| POP | dest¬contents of stack, SP ¬ SP + 2 | |||||||||||
| POPF | flags ¬contents of stack, SP ¬ SP + 2 | ü | ü | ü | ü | ü | ü | |||||
| PUSH | stack ¬source, SP ¬ SP - 2 | |||||||||||
| PUSHF | stack ¬flags, SP ¬ SP - 2 | |||||||||||
| RCL | rotate word or byte left including CF (9 bit or 17 bit rotate); source 1 or CL. | ü | ? | |||||||||
| RCR | rotate word or byte right including CF (9 bit or 17 bit rotate); source is 1 or CL. | ü | ? | |||||||||
| RET | CS:IP or IP ¬stack | |||||||||||
| REP | A prefix. Like LOOP for string instructions. REPE/REPZ and REPNE/REPNZ are also valid | |||||||||||
| ROL | Rotate left 8 or 16 bit dest.; sourceis 1 or CL Bit rotated out is copied to CF | ü | ? | |||||||||
| ROR | Rotate right 8 or 16 bit dest.; sourceis 1 or CL Bit rotated out is copied to CF | ü | ? | |||||||||
| SAHF | flags¬AH (used with LAHF) | ü | ü | ü | ü | ü | ||||||
| SAR | Shift right through CF with sign extension; sourceis 1 or CL | ü | ü | ü | ? | ü | ? | |||||
| SBB | Subtract with borrow. dest¬dest - source- CF | ü | ü | ü | ü | ü | ü | |||||
| SCAS | [ES:DI] - AL or AX. Update DI. SCASB and SCASW are size-specific | ü | ü | ü | ü | ü | ü | |||||
| SHL or SAL | Shift left destthrough CF with 0 fill; sourceis 1 or CL | ü | ü | ü | ? | ü | ? | |||||
| SHR | Shift right destthrough CF with 0 fill; sourceis 1 or CL | 0 | ü | ü | ? | ü | ? | |||||
| STC | CF ¬1 | 1 | ||||||||||
| STD | DF ¬1 String instructions decrement SI and DI | |||||||||||
| STI | Set interrupt enable flag. Maskable interrupts are serviced | |||||||||||
| STOS | [ES:DI] ¬AX or AL. Adjust DI. STOSB and STOSW are size-specific | |||||||||||
| SUB | dest¬dest- source | ü | ü | ü | ü | ü | ü | |||||
| TEST | dest.AND. source | ü | ü | 0 | 0 | ü | ? | |||||
| WAIT | processor idles processing interrupts until the external TEST line is asserted, then continues | |||||||||||
| XCHG | dest«source | |||||||||||
| XLAT | AL ¬[DS:(BX + unsigned AL)] | |||||||||||
| XOR | dest¬dest.XOR. source | ü | ü | 0 | 0 | ü | ? | |||||